MOS output buffers are general purpose building blocks that are used extensively in electronic circuits. In digital CMOS circuits, output states are represented in binary form such that a logic 1 corresponds to a voltage equal to the positive supply and a logic 0 corresponds to a voltage equal to the negative supply. When a circuit node changes the logic state, the capacitance of this node must be charged to the new logic state in a reasonable amount of time. Often, a MOS output buffer is used to provide a sufficient charging current to the output node to change the logic level quickly.
It is often necessary to allow several circuit nodes to drive the same output node. In these situations, to avoid conflicts, when one circuit is driving a particular output node, all other circuits connected to this output node must be placed into a high impedance (tristate) mode. Hence tristatable MOS output buffers which have 3 possible output states: logic 1, logic 0 and high impedance are often used.
Due to the physical properties of MOS transistors, prior art MOS output buffers, when operating in the high impedance mode, have a certain subthreshold leakage current flowing into or out of them. This is undesirable because the MOS buffer's output also may serve as an input to various other circuit nodes which are sensitive to even low levels of leakage currents.
Thus, there exists a need for an output MOS buffer which has a reduced subthreshold leakage current over prior art buffers without degrading the buffer performance.